Center for Co-design of Chip, Package, System

The Center for Co-design of Chip, Package, System conducts leading-edge research in the following areas:
   • System Architecture, Planning, Modeling and Implementation
   • IC Floor Planning, Place & Route, Design, Modeling and Characterization
   • Advanced Packaging, Substrate Fabrication, Modeling and Characterization
   • Advanced Interconnect and 3D Integration Technologies
   • Electronic Design Automation that includes Physical CAD and Multi-physics Modeling
   • Emerging Device and Interconnect Technologies

The center is organized into program specific areas where a group of faculty with complimentary expertise work on application driven technologies. An overview of the programs can be found on our research page.

Center News

Saibal Mukhopadhyay Appointed Joseph M. Pettit Professor

Saibal Mukhopadhyay has been appointed to the Joseph M. Pettit Professorship, effective May 1, 2018.
 
Saibal joined the ECE faculty in 2007 and leads the Gigascale Reliable Energy Efficient Nanosystem (GREEN) Lab, where he advises 12 Ph.D. students and one M.S. student. The goal of Saibal's research is to design smart edge devices for internet-of-things applications. He and his students develop solutions for intelligent computing, energy-efficiency mixed-signal electronics, and secure hardware design. His group has received numerous best paper and best poster awards, and one student has received a Sigma Xi Best Ph.D. Thesis Award. To date, he has graduated 15 Ph.D. students and 7 M.S. students.
 
Saibal has published over 250 refereed journal and conference papers, which have received more than 8,000 citations. He served as technical program committee co-chair for the International Symposium on Quality Electronic Design (ISQED) in 2016 and 2017 and for the International Symposium on Low-power Electronic Design in 2018.
 
Saibal teaches courses in digital integrated circuits and systems and advanced VLSI systems, with averages well over the norms on the undergraduate and graduate levels. He has been honored twice with the Center for Teaching and Learning Class of 1934 Course Survey Teaching Effectiveness Award for acquiring higher than a 4.9 rating in a course. He has also created a new graduate course, “Digital System in Nanometer Nodes,” and actively contributed to the vision of the course on “Physical Foundations of Computer Engineering,” a core course for the undergraduate computer engineering curriculum. 
 
Saibal was elected as an IEEE Fellow earlier this year. He is a past recipient of several prestigious honors including the Office of Naval Research Young Investigator Award, NSF CAREER Award, IBM Faculty Partnership Award, and the SRC Inventor Recognition Award. His work has been funded by the National Science Foundation, DARPA, Office of Naval Research, Semiconductor Research Corporation, Interconnect Focus Center, Sandia National Lab, Intel, IBM, and Qualcomm.